The invention is directed to a method for duplicating the content of data carriers, and also to an apparatus for the implementation of this method.
With continuing advances in electronic data processing in all areas of the economy, the trend to make more and more computer capacity available directly at the work place, in addition to large data-processing systems, has intensified. This can occur in the form of what are referred to as intelligent terminal equipment: as, for example, in the case of personal computers, however, this can also occur in the form of small but nonetheless high-performance, independent computer systems. As a consequence of this trend, the same control information, in order to be able to handle specific program jobs, are required for a multitude of intelligent devices. More and more finished programs are also being developed and offered for this increasing plurality of decentralized or independent, intelligent modules. In practical terms, this means that a multitude of data carriers such as rigid or flexible magnetic discs and also magnetic tapes having identical data content, are produced more and more often and are frequently also sold as independent products.
The problem of duplicating the data content of such a data carrier in an optimally cost-beneficial fashion thus arises, i.e. to transfer the data content from one data carrier onto a plurality of identical or even different carriers. A mechanical pressing process, using a master plate comes into consideration for this purpose when optical storage media is used as data carriers. This mechanical technology, which has been known for a long time, is accordingly mature and cost-beneficial. Optical storage media, however, have not yet become common to a great extent. In the vast majority of cases, data carriers are used on which the information is magnetically stored. For the duplicating event, this means that a respectively separate storage device must be available for every data carrier to be written. The data information to be stored is taken from a data source that is permanently connected to the storage device or is designated to communicate with one of a plurality of connected storage devices via a bus system.
In the present case, this data source is referred to as a host processor, meaning every type of input/output computer of a centralized, decentralized or independent computer system that serves the purpose of exchanging data information with periphery storage devices is connected via a bus system. As already indicated, it is a characteristic feature of known input/output systems that the host processor in fact simultaneously services all connected, peripheral storage devices via the bus system; strictly considered, however, it is in communication with respectively only one of the connected storage devices at a defined point in time. In such a conventional input/output system, the processing performance of the host processor is designed such that it can service all requests for a data transfer of the slower, peripheral storage devices such that, on average, practically no dead times arise at the latter.
Such conventional input/output systems are also being presently utilized for duplicating data carriers; however, they are not optimally adapted to the special characteristics of such a duplicating process. The problem in producing a multitude of data copies cost-beneficially in an optimally short time span, i.e. of storing identical data information on data carriers of an optimally great plurality of peripheral storage devices simultaneously or, even better, actually in parallel. It can in fact be assumed in this copying event that copying is carried out onto data carriers of the same type, i.e. either onto magnetic hard disks, floppy disks or magnetic tapes as well. Without special measures however, it is not directly possible to connect a plurality of storage devices of even one type directly in parallel to the host processor and to thus transfer the data information to be copied into all connected storage devices in parallel with operational reliability and without data loss. This would only be possible if all peripheral storage devices worked in a mode in which they were exactly synchronized from the very beginning. Due to device tolerances, however, this cannot be assumed.
It is therefore the object of the present invention to design a method such that the duplication of data in true parallel operation of all peripheral storage devices connected to the host processor is possible with operational reliability and nonetheless with optimally low technological outlay. In view of this technological outlay, this should also mean that storage devices having conventional interfaces or, respectively, having optimally slight modifications of these interfaces can also be utilized for the implementation of the method of the invention. This object is inventively achieved by the features of the present invention.
In practical terms, this method enables synchronous storage events in a theoretically unlimited plurality of storage devices of the same type, whereby every storage device runs with its individual processing speed, which departs to a greater or lesser degree from that of neighboring storage devices. As usual, every storage device preferably has its own data buffer, so that individual error checks and error corrections, i.e. renewed storing of incorrectly stored blocks of the data information, is possible. All storage devices continue the storing event as long as data yet to be stored are contained in the data buffer. The host processor transfers data into the data buffers of the storage devices in parallel, i.e. updates the content of all connected data buffers simultaneously. With respect to the data transfer and its control, the effect of this for the host processor is as though it were collaborating with only one peripheral device. In comparison to a conventional input/output system, this, among other things, means that the host processor is significantly less burdened with the data transfer to the peripheral storage devices. No special demands are therefore made of the performance capability of the host processor even for a very extensive system comprising a multitude of connected, peripheral storage devices; the host processor can therefore also execute extensive test routines.
A particular advantage of this method becomes clear in an advantageous development of the invention that is directed to an apparatus for the implementation of this method. Only a slight amount of additional structure is required in order to guarantee the synchronization for a data transfer despite a multitude of connected, peripheral storage devices. In order to assure that a data request signal does not take effect in the host processor until all peripheral storage devices have output a corresponding data request, each peripheral storage device could output such a data request via its own control line. These individual data request signals of the individual storage devices would be logically operated with one another in that every individual control line is supplied to an input of an AND circuit having a corresponding plurality of inputs. The active output signal of this AND circuit would then be a suitable data request signal with which the host processor could be driven. This solution, however, would be technologically involved; moreover, it would be disadvantageous and would offer little flexibility with respect to know devices.
Instead of this, the solution of the invention makes use of the properties of what is referred to as a "wired AND" or a "wired OR" operation and uses output stages having an open collector output at the peripheral storage devices for outputting the individual data request signals. By contrast to push-pull output stages that are usually employed, such outputs can be connected in parallel without further ado, and can be operated via a common collector resistor. The potential on the common signal lines connected to all output stages fashioned in this way only lies at a high level when all outputs of the peripheral storage devices exhibit a high signal level. In positive logic, this corresponds to an AND operation. As known, an OR operation can be analogously realized in a corresponding fashion in negative logic.
In the present case, this known possibility of hardwired, phantom operations is advantageously utilized in order to logically operate the individual control requests of the individual peripheral storage devices with one another via only a few control signal lines and to supply them to the host processor. In the case of data requests, the corresponding output stages of the peripheral storage devices comprise two corresponding signal outputs for each open collector circuit, their signal statuses being activated inversely relative to one another. A wired AND operation or a wired OR operation can thus be respectively realized with one of the signal lines and an internal processor data request signal having corresponding signal statuses can be derived therefrom.
In addition to the low technological outlay, this implementation of the synchronization of the individual, connected storage devices for a parallel data transfer also achieves a high degree of flexibility. Viewed systematically, the system in and of itself is definitely not restricted to a specific plurality of peripheral storage devices that are connected and are to be operated. In case of a malfunction, it also allows a peripheral device to be individual? y deactivated without the overall system being deactivated. A monitoring routine must merely assure that a storage device that is momentarily malfunctioning must either disconnect itself on the basis of its own fault monitoring or must be deactivated by the host processor. There is thereby the subsidiary condition that such a deactivated storage device is compelled to generate simulated control signals so that the functionality of the overall system is not more deteriorated than unavoidable in the case of a device fault or outage.
In this application, too, the host processor exchanges a plurality of control signals with the peripheral storage devices, these control signals also being standard in other, conventional bus systems in order to control the data exchange. For executing defined tests or for interrogating the status of the storage devices, for example, the host processor can enter individually into communication with every individual storage device via corresponding addresses. Here, too, wired logic operations can be used. For example, this is valid given a status interrogation of the peripheral devices by the host processor. Among other things, it can thereby be identified via a wired AND operation whether all connected storage devices are ready to operate. When this is not the case even for only one of the connected storage devices, then the host processor identifies a corresponding signal status at the operated status signal. Then, however, it must individually interrogate the individual storage devices in order to identify which storage device is not ready to operate so that it can be deactivated.
Other developments and advantages of the invention derive from the following description of an exemplary embodiment with reference to the Drawings.